Author Topic: Problem with KS8721BL PHY in Keil uVision 4  (Read 39078 times)

Offline H.Nasiri

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Problem with KS8721BL PHY in Keil uVision 4
« on: June 27, 2011, 09:48:24 PM »
Hi friends
I have designed a training board for LPC2368 and use KS8721BL as PHY.
When I test my board with uTaskerV1.3_Olimex_LPC2378-STK.hex (original Hex file), it works well and I can PING the board easily and use http or ftp services !  but when I build uTaskerV1.4_LPC-5 in Keil uVision4, it does not work ! (I can not PING the board)

This is what I have done:
1- Download uTaskerV1.4_LPC-5
2- extract it
3- open uTaskerV1.4_LPC-5_2\Applications\uTaskerV1.4\uVision4_LPC2xxx\uTaskerV1.4.uvproj
4- select LPC2368FBD100 in config.h
5- select Olimex board in config.h
6- build project
7- write Hex file on flash
Should I do anything else...?

What's the PROBLEM ?

Thank you for your attention

Offline mark

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #1 on: June 29, 2011, 07:53:00 PM »
Hi

Does the code run on the board or is it just the Ethernet interface that is not operating correctly? That is, does the blink-LED operate?

If you can debug, set a break point in the fnConfigEthernet() routine in LPC23xx.c and see whether the PHY type is being identoified correctly:

    if ((ulPhyIdentifier & PHY_MASK) != (PHY_IDENTIFIER & PHY_MASK)) {   // {1}
        return;                                                          // if the identifier is incorrect the phy isn't responding correctly
    }



It may not be identifying the PHY and then Ethernet is aborted - although there shouldn't be any difference between V1.3 and V1.4 in this respect.

If the board is not starting check the target that you are using - the Keil project has targets "uTaskerV1.4" and "uTaskerV1.4_BM". Don't use the uTaskerV1.4_BM if you don't have a uTasker boot loader installed since it can't run without it.

Regards

Mark

Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #2 on: June 30, 2011, 06:54:57 PM »
Hi Mark
My hardware's a little different with olimex but Ethernet interface operating well with original Hex file(HTTP & FTP services works fine).

If you can debug, set a break point in the fnConfigEthernet() routine in LPC23xx.c and see whether the PHY type is being identoified correctly:
    if ((ulPhyIdentifier & PHY_MASK) != (PHY_IDENTIFIER & PHY_MASK)) {   // {1}
        return;                                                          // if the identifier is incorrect the phy isn't responding correctly
    }


I do that but nothing change !

If the board is not starting check the target that you are using - the Keil project has targets "uTaskerV1.4" and "uTaskerV1.4_BM". Don't use the uTaskerV1.4_BM if you don't have a uTasker boot loader installed since it can't run without it.


I run uTaskerV1.4_LPC-5\Applications\uTaskerV1.4\uVision4_LPC2xxx\uTaskerV1.4.uvproj

What's your idea ?

thank you for your attention

Offline mark

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #3 on: June 30, 2011, 07:13:14 PM »
Hi

I don't understand the answers yet:
1) Do the blink LED flash on the board indicating that the SW is starting? [YES/NO]
2) Does the PHY check detect the PHY or does it return? [YES/NO/doesn't get to this check]
3) The project uTaskerV1.4_LPC-5\Applications\uTaskerV1.4\uVision4_LPC2xxx\uTaskerV1.4.uvproj contains two targets (uTaskerV1.4 and uTaskerV1.4_BM). Which target is selected in the project? [uTaskerV1.4/uTaskerV1.4_BM]

Please state which of the possible answers are true so that the state is clear.

Regards

Mark

Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #4 on: July 01, 2011, 02:59:34 PM »
Hi

1) My hardware is different with OLIMEX_LPC2378_STK so what do you mean by blink LED ? my boards LEDs are on different PORT (P1.21_P1.28) how can I change it for my board ?
2) fnConfigEthernet() dos not run at all !!! (I check it with blink one LED)
3) uTaskerV1.4

thanks

Offline mark

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #5 on: July 01, 2011, 05:44:19 PM »
Hi

The watchdog task usualyl flashes and LED at 2.5Hz so that it is visibale that the SW is operating.
For example,
#define TOGGLE_WATCHDOG_LED()     _TOGGLE_PORT(0, (BLINK_LED))
This is defined to suit the board.

However, if the code is not getting to the Ethernet initialisation there si a problem with the code starting. It looks as though the correct configuration is being used.

It may be that the linker script file is not matching the chip: check that the defined amount fo RAM is correct (if it is set too large it will not be able to run).
Also check that the file system / parameter system is not set up to try to access Flash which is not available. Ensure also that SPI Flash is not enabled in the project since this could cause the board to hang when tryaing to work with it.

In such case it is best to try to debug the code from the reset vector since it is then easy to see how far it is getting and wher it hangs or causes an exception. Presumably it is due to a mismatch between the settings and the target processor but it is not easy to identify where this is since it can be at many possible locations. Can you debug the code on the target?

Regards

Mark

Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #6 on: July 01, 2011, 07:58:07 PM »
Hi
Unfortunately I don't have debugger  :(
I changed Blink_LED port proper my board and fortunately it flash   ;D
what's your idea ?

another question:
what's the PHY_Address in #define PHY_ADDRESS_ (0x01 << 8)
is it 5bit hardware address ?
what's the meaning of (0x01 << 8) ?

« Last Edit: July 01, 2011, 08:01:23 PM by H.Nasiri »

Offline mark

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #7 on: July 01, 2011, 09:53:21 PM »
Hi

If the LED is blinking normally the SW is basically running.

#define PHY_ADDRESS_ (0x01 << 8)

is the define for the PHY's address, which can be 0x01..0x1f, depending on the state of its strap inputs when it leaves reset. You may need to check that these are well defined on your board (beware that the PHYs have internal pull-up and pull-downs and these can sometimes collide with the processor's internal pull-up/pull-downs on some ports).

What you could do is to add a loop which requests the ID from addresses 0x01..0x1f and indicates which one returns the correct value (if any).

Unfortunalely is is not very efficient to work without a debugger and it may be a good investment to obtain one if large amounts of work are foreseen, to save time and increase efficiency. Olimex has a low cost one which can be used with Rowley Crossworks which is a good choice especially for low budget private or educational work.

Regards

Mark

Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #8 on: July 11, 2011, 08:25:13 AM »
Hi Mark
thank you for your help
my problem was very simple  "#ifndef DEVICE_WITHOUT_ETHERNET  #define ETH_INTERFACE"  ;D

but I have three question:

1) Is PHY_ADDRESS_ important when there is one PHY transceiver on board ? no effect when I change PHY_ADDRESS_

2) All of PHY registers value are maximum (65535 for u int) after read like GENERIC_PHY_IDENTIFIER_1 & GENERIC_PHY_IDENTIFIER_2 ? what is the reason ?

3) I want to change keil "easy web" to work on my hardware. as I know there is no basically difference between KS8721 and DP83848 just in PHY identifier ! (I'm right ?) but I couldn't ping my board with easy web reformed code? what's your idea ?

Thank you very much  :)

Offline mark

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #9 on: July 11, 2011, 03:19:22 PM »
Hi

The value of PHY_ADDRESS_ does need to match the address used by the PHY (between 1 and 31) otherwise the PHY will not respond. It doesn't matter that there is only one PHY avaialble since it will still only respond to requests on its address.

If the read value is 65535 (0xffff) it means that the PHY is not responding (either not correctly addressed or not connected).

It is true that there is little difference between the PHY types for the SW and basic communication should be possible even if the PHY is not configured by SW (as long as the HW straps set the basic operation).

I would try to find out why the PHY ID is not responding - you could also try ignoring the PHY ID returned (don't return when it is not correct) and see whether it then responds to a PING.

Regards

Mark

P.S. The phy address is common problem - see also http://www.utasker.com/forum/index.php?topic=161.0 for extra details

Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #10 on: August 31, 2011, 02:58:16 PM »
Hi Mark
I was busy for 2 month but nowadays I'm free and after work on your great project (uTaskerV1.4_LPC-5) , I discover my bug:
#ifndef DEVICE_WITHOUT_ETHERNET
    #define ETH_INTERFACE                                                // enable Ethernet interface driver
#endif
and actually PHY ID is responding well.  ;D
your project (uTaskerV1.4_LPC-5) is really professional and unbelievable complete but a bit difficult to understand for me.
Keil easy web project is simple and understandable for me, but I have problem with EMAC.c . I changed PHY_ID = 0x00221619 and Phy_add = 0x0000 according my board but it does not answer to ping yet !
would you please help me to modify DP83848 EMAC.c for KS8721 ?

Regards
Hadi


Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #11 on: August 31, 2011, 09:37:49 PM »
Hi everybody
 ;D ;D ;D ;D ;D ;D ;D ;D ;D ;D ;D
after 6 hours I found the problem !
Just add MAC_MCFG = (MCFG_RES_MII | MCFG_CLK_SEL); after PCONP |= 0x40000000; in void Init_EMAC(void)

here is complete Init_EMAC():

void Init_EMAC(void)
{
// Keil: function modified to access the EMAC
// Initializes the EMAC ethernet controller
  unsigned int regv,tout,id1,id2;
 
   /* Power Up the EMAC controller. */
   PCONP |= 0x40000000;

   /* reset the MII management interface to disable clock. */
   MAC_MCFG = (MCFG_RES_MII | MCFG_CLK_SEL);

  /* Enable P1 Ethernet Pins. */
  if (MAC_MODULEID == OLD_EMAC_MODULE_ID) {
    /* For the first silicon rev.'-' ID P1.6 should be set. */
    PINSEL2 = 0x50151105;
  }
  else {
    /* on rev. 'A' and later, P1.6 should NOT be set. */
    PINSEL2 = 0x50150105;
  }
  PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;

  /* Reset all EMAC internal modules. */
  MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
             MAC1_SIM_RES | MAC1_SOFT_RES;
  MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;

  /* A short delay after reset. */
  for (tout = 100; tout; tout--);
  IODIR1 = 0x1FE00000;
  IOCLR1 = 0x1FE00000; 

  /* Initialize MAC control registers. */
  MAC_MAC1 = MAC1_PASS_ALL;
  MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
  MAC_MAXF = ETH_MAX_FLEN;
  MAC_CLRT = CLRT_DEF;
  MAC_IPGR = IPGR_DEF;

  /* Enable Reduced MII interface. */
  MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;

  /* Reset Reduced MII Logic. */
  MAC_SUPP = SUPP_RES_RMII;
  for (tout = 100; tout; tout--);
  MAC_SUPP = 0;

  /* Put the DP83848C in reset mode */
  write_PHY (PHY_REG_BMCR, 0x8000);

  /* Wait for hardware reset to end. */
  for (tout = 0; tout < 0x100000; tout++) {
    regv = read_PHY (PHY_REG_BMCR);
    if (!(regv & 0x8000)) {
      /* Reset complete */
      break;
    }
  }

  /* Check if this is a DP83848C PHY. */
  id1 = read_PHY (PHY_REG_IDR1);
  id2 = read_PHY (PHY_REG_IDR2);
  if (((id1 << 16) | (id2 & 0xFFFF)) == DP83848C_ID) {
     
    /* Configure the PHY device */

    /* Use autonegotiation about the link speed. */
    write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
    /* Wait to complete Auto_Negotiation. */
    for (tout = 0; tout < 0x100000; tout++) {
      regv = read_PHY (PHY_REG_BMSR);
      if (regv & 0x0020) {
        /* Autonegotiation Complete. */
        break;
      }
    }
  }
  /* Check the link status. */
  for (tout = 0; tout < 0x10000; tout++) {
    regv = read_PHY (PHY_REG_STS);
    if (regv & 0x0001) {
      /* Link is on. */
      break;
    }
  }

  /* Configure Full/Half Duplex mode. */
  if (regv & 0x0004) {
    /* Full duplex is enabled. */
    MAC_MAC2    |= MAC2_FULL_DUP;
    MAC_COMMAND |= CR_FULL_DUP;
    MAC_IPGT     = IPGT_FULL_DUP;
  }
  else {
    /* Half duplex mode. */
    MAC_IPGT = IPGT_HALF_DUP;
  }

  /* Configure 100MBit/10MBit mode. */
  if (regv & 0x0002) {
    /* 10MBit mode. */
    MAC_SUPP = 0;
  }
  else {
    /* 100MBit mode. */
    MAC_SUPP = SUPP_SPEED;
  }

  /* Set the Ethernet MAC Address registers */
  MAC_SA0 = (MYMAC_6 << 8) | MYMAC_5;
  MAC_SA1 = (MYMAC_4 << 8) | MYMAC_3;
  MAC_SA2 = (MYMAC_2 << 8) | MYMAC_1;

  /* Initialize Tx and Rx DMA Descriptors */
  rx_descr_init ();
  tx_descr_init ();

  /* Receive Broadcast and Perfect Match Packets */
  MAC_RXFILTERCTRL = RFC_BCAST_EN | RFC_PERFECT_EN;

  /* Enable EMAC interrupts. */
  MAC_INTENABLE = INT_RX_DONE | INT_TX_DONE;

  /* Reset all interrupts */
  MAC_INTCLEAR  = 0xFFFF;

  /* Enable receive and transmit mode of MAC Ethernet core */
  MAC_COMMAND  |= (CR_RX_EN | CR_TX_EN);
  MAC_MAC1     |= MAC1_REC_EN;
}

and apply this changes to EMAC.h (line 295)

#define DP83848C_DEF_ADR    0x0000        /* depends on the hardware          */
#define DP83848C_ID         0x00221619     /* KS8721HY Identifier                   */

good luck

regards

Hadi





Offline H.Nasiri

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Re: Problem with KS8721BL PHY in Keil uVision 4
« Reply #12 on: September 01, 2011, 03:12:40 PM »
Hi Mark
finally I could load a HTML page from LPC2368 in easy web but there is strange problem in ks8721 configuration !
I add "MAC_MCFG = (MCFG_RES_MII | MCFG_CLK_SEL)" to EMAC.c and every thing seems OK and the communication between board and PC is correct but in this condition "read_PHY (PHY_REG_IDR1)" return 0 !!!
Is it important bug that "read_PHY (PHY_REG_IDR1)" return 0 ?
Note that when I add "MAC_MCFG = MCFG_CLK_SEL" after "MAC_MCFG = (MCFG_RES_MII | MCFG_CLK_SEL)", return value from "read_PHY (PHY_REG_IDR1)" is correct !!! but it makes a big delay (about 2 second) to response PHY after micro reset.
what's your idea ?

thank you for your attention

regards

Hadi