IAR 7.3 ARM Optimisation error

[mark]

Hi All

It has been identified that from IAR 7.3 ARM  (probably, since that is when the problem started to be noticed) operation can become unreliable or fail due to an optimisation error. This takes place when the optimiser identifies code where it can insert __aeabi_memset() to improve performance (see http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka3934.html).

The failure takes place in code like this:

    while (Size--) {
        *ptr++ = ucValue;
    }

where the IAR optimiser replaces it with
MOVS R2, R1
SUBS R1, R0, #1
MOVS R0, R4
BL __aeabi_memset

When debugging the code it is seen that Size is 0x28 (in a test instance), which is in register R2. The destination pointer address is in R4.
The count value is decremented by 1 and then it and the pointer are passed to the optimised __aeabi_memset() in registers R1 (0x27) and R0 (destination pointer). The error is that the decremented count value is passed to the library routine whereas it should not be decremented in this situation.

The result is that 0x27 bytes are set with the value instead of 0x28. The result can have serious concequences since it leaves the final byte at an uninitialised value (random).

This is being reported to IAR, whereby it is to note that the problem was not known in previous versions (not reported by users or not noticed as effect) and also all other tests with other compilers have not shown a similar issue.

In the mean time it is recommended to use "medium" optimisation rather than "high" since with medium the substitution is not made and the operation is then correct. The resulting code size increase is about 6%.

Regards

Mark

[mark]

Hi All

I have confirmation from IAR that the bug has been resolved from EWARM ServicePack 7.30.4.

Regards

Mark