M5225X FlexBus

[mark]

Hi All

The new M5225X family have a reduced FlexBus supporting 2 Chip Selects. By configuring ports TE, TF, TG and TH to FlexBus mode it is possible to address up to 1Meg of 8 bit external memory (or other peripherals). The bus is fast, allowing 12.5ns* cycles with 80MHz PLL (which can be matched to the memory/peripherals using additional wait states). [*12.5ns at 80MHz in 1:1 mode or 25ns in 1:2 mode as controlled by MBMOD in the Chip Configuration Extended register]

The M52259EVB is delivered with an MRAM chip on-board (MR2A16ACYS35). This is a 256k magnetoresistive random access memory with read and write times of just 35ns, compatible with 35ns SRAM. It is made by EVERSPIN TECHNOLOGIES, to whom Freescale has transferred this technology to. It retains data for 20 years, has no wear-out and can replace SRAM and FLASH. Of course it is more expensive that FLASH but there are certainly applications where type of device is perfect - it is essentially FLASH with the ease and speed of SRAM (a modern bubble-memory may be the correct description..(?)).

So it was time to try out the FlexBus - and the MRAM was predestined. After learning some details about the FlexBus configuration I managed to add a set up to the M5223X project which operates the uFileSystem from MRAM. In addition I could confirm that the transfers to and from the MRAM via FlexBus works correctly using DMA.

This configuration will thus be included in the forthcoming SP9 to the M5223X project, including the new M5225X support. I believe that the DEMO and EVB boards will not be delivered for a couple of weeks so I prefer to continue experimenting with the new capabilities of the device so that the SP release will include as much new stuff as possible. If you do receive a board before expected just tell me so that the SP can be made ready to go. Note that you will not have MRAM on the DEMO board - it is only on the EVB.

Regards

Mark

[neil]

Hi Mark,
 I was thinking of using a 512k x 8 SRAM memory with 12ns access time, would this work okay with the FlexBus (I see the MR2A16ACYS35 is used in the EVB, but see its quite expensive )? The bad thing I would lose the extra I2C port.

Would this just extend the RAM address range from 64k to 576k, without the need of worrying whether variables will be stored in external or internal RAM?

Neil

[mark]

Hi Neil

Using the MiniFlexBus you can add memory mapped RAM. Accesses can be as fast as 80MHz, so your RAM will not need any wait states.
You can use it in 8 or 16 bit mode, where 16 bit is of course more efficient - it will however not be as efficient as internal RAM when 32bit accesses are made.

You can position variables (or heap) into the external RAM - to do this you can add a section in the linker, or possibly position the RAM to follow on from internal SRAM (I think that it can be set to a 64k boundary). I would keep the stack in internal SRAM and also the Ethernet buffers so as not to decrease efficiency.

regards

Mark

[neil]

Hi mark,
   I will be using A0-A17, is it possible to use A18 & A19 as input/output pins?

   I was also thinking of purchasing the DEMO kit to test it out, I see the demo schematic has I/O connector, but cant see them on the board (on free scale web site). Can you tell me if these are accessible?

Regards
Neil

[mark]

Hi Neil

The MiniFlexBus setting is a peripheral operation of the ports, therefore the individual port use can be defined as required.

This is the configuration used to set up the full address bus:

    PTEPAR = 0xff;                                                       // address A0..A7
    PTFPAR = 0xff;                                                       // address A8..A15
    PTGPAR = (0x0f | ((PRIMARY_FUNCTION_D << BIT_7_D_SHIFT) | (PRIMARY_FUNCTION_D << BIT_6_D_SHIFT) | (PRIMARY_FUNCTION_D << BIT_5_D_SHIFT))); // A16..A19, D0, D1, CS_B

As you can see, port G pins can be used for A16..A19 (plus some data lines and chip select). If you don't configure A18 and A19 for their peripheral function they can be used as general purpose ports.

Regards

Mark