Hi Mark,
yes my basic mode of operation is from the IRC48M. However, the only reason I start from IRC48M is because, as it appears from the MCG_Lite mode state diagram (see attached illustration) I can't go directly from LIRC8M to LIRC2M and viceversa, but I need to go to IRC48M first.
But from your answer 4 it looks like I'm wrong and I could go directly from LIRC8M to LIRC2M (?)
1. If I understood correctly, the FCRDIV is set with the SLOW_CLOCK_DIVIDE as I can also see from this snippet of kinetis.h
#elif defined RUN_FROM_LIRC
#if defined RUN_FROM_LIRC_2M
#define IRC_CLOCK 2000000
#else
#define IRC_CLOCK 8000000
#endif
#if defined SLOW_CLOCK_DIVIDE
#if (SLOW_CLOCK_DIVIDE == 1)
#define SLOW_CLOCK_DIVIDE_VALUE (MCG_SC_FCRDIV_1)
#elif SLOW_CLOCK_DIVIDE == 2
#define SLOW_CLOCK_DIVIDE_VALUE (MCG_SC_FCRDIV_2)
#elif SLOW_CLOCK_DIVIDE == 4
#define SLOW_CLOCK_DIVIDE_VALUE (MCG_SC_FCRDIV_4)
...
...
2. No, I don't plan to use peripherals, like UART, so I don't need LIRC_DIV2. But I'm using SPI, so I need BUS_CLOCK_DIVIDE.
So here are a couple of questions on the logic of OUTDIV1, OUTDIV4 and BUS_CLOCK_DIVIDE.
a) Do I just need to set a value for the main clock and BUS_CLOCK_DIVIDE and uTasker will automatically define the values for OUTDIV1 and OPUTDIV4?
b) If I switch from LIRC8M to LIRC2M, can I (and if so, how?), change the values for SLOW_CLOCK_DIVIDE, or BUS_CLOCK_DIVIDE? Since the clock is slower now, I might need to update them.
3. How can I disable IRC48M when I don't need it any more?
Yes I remember the issue with UART with slower clocks and you already helped me fix it
Thanks,
Raff