µTasker Forum
µTasker Forum => NXPTM M522XX, KINETIS and i.MX RT => Topic started by: mark on May 23, 2008, 11:43:55 PM
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Hi All
Some processors can not access short and long words when they are not aligned on the correct boundaries (eg. 0x0, 0x4 for long word and 0x0, 0x2 for short word). For this reason uMalloc() always returns memory on a long word boundary so that all structs will be aligned and so not cause possible access violations. These processors contain the define _ALIGN_HEAP_4 in their hardware header file.
The Coldfire can access words on odd boundaries and so doesn't 'need' this. However such accesses are not as efficient as natural boundary accesses. For example, to access a long word from an odd boundary it will be necessary to read twice (from the natural boundary below to get the first part, and from the natural boundary above to get the rest). This is quite complicated but is solved in the hardware so that it is not noticed by the user. It means that structs can be packed on each other without ever needing to leave any space. It also means that, although some RAM can be optimised, accesses are not always as fast as they could be.
By putting the define _ALIGN_HEAP_4 into app_hw_m5223x.h it will force uMalloc() to also always return long word aligned memory. This will ensure that all accesses are optimally fast, even if the amount of heap memory required will increase slightly.
You may like to give it a try in your project!!
Note that there are various other hardware requirements for aligning memory. Sometimes this is on a larger boundard (8, 16, 32 etc.) as required by some peripherals. To achieve this specifically the project contains the alternative call uMallocAlign() - this can be passed a paremeter to inform of the required boundary. An example can be found in M5223X.c:
ptrBuffer = uMallocAlign((MAX_MALLOC)(ucMultiBuf*256*NUMBER_OF_RX_BUFFERS_IN_ETHERNET_DEVICE), 16);
Here a buffer for use by the Ethernet controller must have a starting address aligned to a 16 byte boundary.
Regards
Mark