µTasker Forum

µTasker Forum => NXP^TM M522XX, KINETIS and i.MX RT => Topic started by: FAQ on May 16, 2009, 01:30:24 PM

Title: Data bus connection on M5225X MiniFlex
Post by: FAQ on May 16, 2009, 01:30:24 PM

The schematics of the 52259EVB FlexiBus show the connections between 52259 and the MRAM chip:
 
52259    RAM chip
  D0 --------- D0
  D1 --------- D1
  D2 --------- D2
  D3 --------- D3
  D4 --------- D7
  D5 --------- D6
  D6 --------- D5
  D7 --------- D4
 
The processor D0-D3 match the MRAM chip's D0-D3, then D4-D7 of the processor swaps around on the Ram chip. Is this an error?

Title: Re: Data bus connection on M5225X MiniFlex
Post by: mark on May 16, 2009, 01:33:34 PM

Hi

I think that the reason for the strange looking connection is because it routes better. The EVB has the data lines also connected to 2 data pins and selects the upper/lower byte using A0 – it is this operating in 8 bit data mode (see also http://www.utasker.com/forum/index.php?topic=552.msg2423#msg2423).

52259    RAM chip
  D0 --------- D0 – D15
  D1 --------- D1 – D14
  D2 --------- D2 – D13
  D3 --------- D3 – D12
  D4 --------- D7 – D11
  D5 --------- D6 – D10
  D6 --------- D5 – D9
  D7 --------- D4 – D8

Since the signals can be up to 80MHz it is important that they are routed cleanly and swapping lines can help. The fact is that you can connect data lines in any order – they don’t need to be D0..D7. What you save at one bit will come out on the same bit so it really doesn’t matter how you name them or connect them. The same is true for the address lines for RAM – for FLASH the address lines are less flexible since the sectors have to remain addressed in defined groups and the data lines are often used for commands (so the bits in the commands have to be at the right place – which can of course be swapped in SW if required).

Regards

Mark