Recent Posts

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21
STTM STM32 and STR91XF / Re: STM32 uTaskerBoot Project
« Last post by TeeYi on November 29, 2022, 05:19:31 AM »
Hi Mark,
    Thanks for your reply.
     So if I pay for the license fee, I can get the professional version for STM32 with ADC & external interrupt feature with reference application? If  yes, how can I proceed for here?
     Thanks.
22
µTasker general / How to view debug messages on the uTasker Simulator
« Last post by Matias on November 29, 2022, 12:33:13 AM »
Hello! I am getting started with uTasker and got stuck when trying to simulate debug messages sent over UART. I've been following the guide at https://www.utasker.com/docs/uTasker/uTaskerV1.4_user_guide.PDF and got to the point of actually seeing the "Hello Worlds" when running the project on my FRDM-K64F through a serial monitor on my PC. However, when running the simulator I see at the bottom that the UART0 is mapped to the COM 4, but there is no COM Port showing up in my device manager and I could not connect to it using a serial monitor.

Do you know how I could see these messages sent over UART? Am I supposed to be doing something differently?

Thank you for your help! I am still learning about embedded systems at university and found the uTasker project super interesting.
23
STTM STM32 and STR91XF / Re: STM32 uTaskerBoot Project
« Last post by mark on November 28, 2022, 02:04:16 AM »
Hi

The open source project supports the ADC and port interrupts but the reference application didn't include the STM32 interface (instead it was using a Coldfire one, which generated the errors).
I just checked in new versions of
ADC_Timers.h
and
Port_Interrupts.h
which includes the STM32 interface.


The open source version is freely and anonymously available (supporting Kinetis and STM32) but is several years behind the development state of the professional version and doesn't include things like security, or WiFi support, for example. It is also not supported - apart from some bug fixes and occasional updates.

The professional project version is a supported version with much extended functionality and continuous development of features. It is not intended for hobby use and is licensed in professional product developments:
Licensing is detailed at https://www.utasker.com/Licensing/License.html
Prices are detailed at https://www.utasker.com/Licensing/Prices.html
and licenses are purchased at https://www.utasker.com/Payment/Payment.html
which are either single product (3 months of personal support and access to the development repo.) or full (any number of products and 12 months support and access).

Regards

Mark
24
STTM STM32 and STR91XF / Re: STM32 uTaskerBoot Project
« Last post by TeeYi on November 18, 2022, 06:05:43 AM »
Hi Mark,
    Another question, I saw you mention about the open source version (currently I am using this version) and professional version. What is the different between those two version? Will the professional version support all the ADC & external port interrupt function, and how can I get this professional version?
    Thanks.
   
25
STTM STM32 and STR91XF / Re: STM32 uTaskerBoot Project
« Last post by TeeYi on November 16, 2022, 03:02:12 AM »
Hi Mark,
    For this project I need to use the ADC & Interrupt, which I enable

#define SUPPORT_ADC      (in app_hw_stm32.h file)

and


       #define IRQ_TEST                                                 // test IRQ port interrupts
     (in Port_Interrupts.h file)

But same error during compiling the project.

Updating build tree...
application.c 
Error[Pe020]: identifier "INTERRUPT_LEVEL_1" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 466
Error[Pe020]: identifier "IRQ_BOTH_EDGES" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 468
Error[Pe020]: identifier "INTERRUPT_LEVEL_4" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 471
Error[Pe020]: identifier "INTERRUPT_LEVEL_5" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 477
Error[Pe020]: identifier "INTERRUPT_LEVEL_7" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 483
Error[Pe020]: identifier "test_nmi_7" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 484
Error[Pe020]: identifier "IRQ11_INTERRUPT_PRIORITY" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\Port_Interrupts.h 489
Error[Pe136]: struct "stADC_INTERRUPT_RESULT" (declared at line 8340 of "F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ADC_Timers.h 653
../../Hardware/STM32/STM32.h") has no field "ucADC_flags"
Error[Pe020]: identifier "ADC_ERR_PRIORITY" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ADC_Timers.h 851
Error[Pe020]: identifier "ADC_SINGLE_ENDED" is undefined F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ADC_Timers.h 857
Error[Pe136]: struct "stADC_SETUP" (declared at line 8358 of "F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ADC_Timers.h 860
../../Hardware/STM32/STM32.h") has no field "int_adc_speed"
Warning[Pe223]: function "ADC_SAMPLING_SPEED" declared implicitly F:\Utasker\uTasker-Kinetis-master\Applications\uTaskerV1.4\ADC_Timers.h 860
Error while running C/C++ Compiler
arp.c 

     Just want check with you, this STM32 project is not ready for ADC & port interrupt function?
     Please advice.
     Thanks.
     Tee
26
NXPTM M522XX, KINETIS and i.MX RT / Re: setting up FlexRAM from loader for iMXRT1062
« Last post by jackking on July 25, 2022, 10:34:40 PM »
Mark, thanks for the quick reply.  Thanks for confirming that the fixed OCRAM was not meant to be represented in the header.

27
NXPTM M522XX, KINETIS and i.MX RT / Re: setting up FlexRAM from loader for iMXRT1062
« Last post by mark on July 25, 2022, 12:49:48 AM »
Hi

The i.MX RT1062 has 512k FlexRAM and 512k OCRAM2. The 512k OCRAM2 is not part of the FlexRAM and its size and location are fixed.
This means that
0f000f would be referring to only FlexRAM and giving
480k DTC, 0 ITC and 480k OCR, which is not possible as there is not so much FlexRAM.
therefore the question is what you are referring to with your 512k OCR size? If it is the fixed OCRAM2 it is not in the FlexRAM and the FlexRAM setup would be 100000 16 x DTC banks (at 32k each) for a total of 512k DTC, 0 ITC and 0 OTC (with 512k fixed OCRAM2).

The header is 760 bytes in total (required padding size) and the first two bytes are 0x2f8 (760) to indicate its size (in case it were to change at some point). The size entry is therefore a part of the overall padding and so I think that the document is accurate.

Regards

Mark
28
NXPTM M522XX, KINETIS and i.MX RT / setting up FlexRAM from loader for iMXRT1062
« Last post by jackking on July 24, 2022, 04:53:29 PM »
In the guide (page 21): https://www.utasker.com/docs/iMX/MCUXpresso.pdf

It states that FlexRAM can be preconfigured for the application:

Quote
In comparison, this one has the desired FlexRAM configuration:
02f8 // first two bytes specify the length
030805ffffff // specify DTC/ITC and OCR bank sizes to be
pre-configured for the application (when not ff)
ffffffffffffffff
ffffffffffffffff
followed by further ff padding bytes
....
3 banks to be assigned to DTC, 8 to ITC and 5 to OCR

Does the number of banks include the mandatory 512k OCR banks on the 1062?

For example, in my app I have DTC = 512k, ITC = 0k, OCR = 512k
Would the header.txt be?:
Code: [Select]
02f8                   // first two bytes specify the length
0f000fffffff           // specify DTC/ITC and OCR
ffffffffffffffff
ffffffffffffffff
Also, in the example the byte count is shorter by than the blank 0xff padding, is this intentional?
29
NXPTM M522XX, KINETIS and i.MX RT / Re: 1 UDP socket for server and client?
« Last post by neil on June 29, 2022, 09:50:27 AM »
Hi Mark,
   Many thanks for the reply.

Best Regards
Neil
30
NXPTM M522XX, KINETIS and i.MX RT / Re: 1 UDP socket for server and client?
« Last post by mark on June 29, 2022, 12:50:38 AM »
Neil

If you send a UDP packet to an IP address whose MAC is not known it will cause ARP resolution to be started (and not the UDP frame being sent).

ARP informs the owner task, which can then resend the UDP frame when the MAC address is known:

        case TASK_ARP:
            fnRead(PortIDInternal, ucInputMessage, ucInputMessage[MSG_CONTENT_LENGTH]); // read the message content
            switch (ucInputMessage[0]) {                                 // ARP sends us either ARP resolution success or failed
            case ARP_RESOLUTION_SUCCESS:                                 // IP address has been resolved (repeat UDP frame).
                fnSendUDP(MyUDP_Socket, ucUDP_IP_Address, MY_UDP_PORT, (unsigned char*)&ptrUDP_Frame->tUDP_Header, UDP_BUFFER_SIZE, OWN_TASK);
                break;

            case ARP_RESOLUTION_FAILED:                                  // IP address could not be resolved...
                break;
            }
            break;

See also the UDP thread at https://www.utasker.com/forum/index.php?topic=41.0 which explains it in detail.

Regards

Mark
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