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TI C2000 Concerto Familty (Cortex M3 + C2000 DSP in one chip)


Hi All

In case you haven't already heard, Texas Instruments has released a new family of MCUs incorporating a Cortex M3 and C2000 DSP with floating point unit - the "C2000 Concerto Microcontroller" family

The present models are the following:

F28M35xyyz where

x = E (60MHz DSP / 60MHz Cortex)
x = M (75MHz DSP / 75MHz Cortex)
x = H (100MHz DSP / 100MHz Cortex or 150MHz DSP / 75MHz Cortex)

yy = 20 (72k RAM / 512k Flash)
yy = 22 (136k RAM / 512k Flash)
yy = 32 (136k RAM / 768k Flash)
yy = 50 (72k RAM / 1024k Flash)
yy = 52 (136k RAM / 1024k Flash)

z = B (-)
z = C (Ethernet + USB OTG)

Grades exist also up to -40°C..+125°C, presently in 144 pin QFP housing.

The CPU is known as the host, which usually performs MMI and communication tasks, leaving the DSP to concentrate on performing control loops.

Although I have and sometimes still do develop DSP software it is the Cortex M3 based host part that is of main interest here - DSP developers will already understand the benefits of its use in control applications; being in a single chip with shared RAM communication between CPU and DSP it is also clear that the space requirements and design complexity are greatly reduced. It is however to be noted that the DSP part has lots of PWM and timer channels, fast comparators and also 20 x 12 bit ADC inputs as well as its own UART, SPI and I2C interfaces.

The first question may be why the Cortex M4 was not chosen by TI for the CPU host. The reason is quite simply because a Cortex M4 is more or less a Cortex M3 plus DSP extensions and floating point unit - for communication tasks the CPU rarely needs these and the DSP already has FPU and complete DSP support anyway.

Looking at the Cortex's peripherals one finds that it is more-or-less based on a Tempest Stellaris with
- (optional) Ethernet EMAC (needs external PHY via MII) with IEE 1588 precision time protocol and USB OTG
- 4 x SPI
- 5 x UART
- 2 x CAN
- 2 x I2C
- External memory interface
- 64 x I/O pins

Inter-processor communication:
In such designs the communication between CPU and DSP is usually a main design point, often using serial communication or shared memory with a bus arbiter. The Concerto makes life easy with its shared SARAM, message SARAM or message registers which allow fast message passing in a controlled access write environment, including interrupt / flag mode.
Alternative methods of internal serial communication in loop-back modes are of course also still possible.

Development tools available:
- controlSUITE(TM) - a TI utility that manages information concerning latest data sheets, evaluation boards, development kits, example projects, schematics, drivers, SW software libraries, application notes, etc.
- Code Composer Studio (TM) V4 IDE - Eclipse based environment available as Platinum version (all Texas chips and DSPs) or Microcontroller edition (supporting MCUs - pretty much all TI devices with Flash and including the cores in the Concerto). Special with this solution is the support for cross-triggering, allowing breakpoints to stop execution of both cores and side-by-side debugging of the two cores in the IDE.
I fact it was just found that TI is offering both Platinum and MCU versions of the CCS4 for the same price of $445 !!
- An experiment board includes an inbuilt JTAG emulator accepts daughter boards. These can be ordered from TI or are also available from various distributors. Guide price for a starter kit "F28M35H52 Experimenter Kit" including the experimenter board with a control card is $139.

It remains to be seen when other IDE providers can offer an alternative to the CCS4 due to the fact that it is not working with just a Cortex M3 but also with a C2000 DSP in a single JTAG daisy-chain. At the moment it seems best to play safe and go along with the TI tools...



Do you have made any inspection yet, how much effort is needed for adapting existing Luminary Micro uTasker project to Concerto ARM+DSP? Our interest here is uTasker support of just ARM part of processor for etherent communication, because we have complete developed code and enviroment for TI 28x DSP processors which we use in few of our projects. Few weeks ago we have bougth development board with Concerto processor, but didn't find yet time to play with it.

Best regards

Andrija Ersek

Hi Andrija

--- Quote ---Few weeks ago we have bougth development board with Concerto processor, but didn't find yet time to play with it.
--- End quote ---

I know that feeling well. I have had my board for rather longer than that without being able to start on it!

First of all to the planes:
- I am assuming that the device essentially has a Stellaris Cortex M3 in it equivalent to the ones that are also supported in the LM3Sxxx project. It is presumably based on best silicon and so is reliable and low risk to TI. Due to the communication between the processor and DSP there is obviously some new stuff there and there are presumably some differences due to the way that the system boots and controls its clocks. This means that to get the processor part working as the standard project works should not be a big problem but will certainly require some  (minor) adjustments in the process.
- It doesn't make much sense in incorporating DSP code in the uTasker project. The stuff running on the C2000 core will be doing very different work and DSP users will be working with long-standing TI DSP libraries and such. Therefore the uTasker project would only contain a simple example DSP project - something existing from TI for example - that simply shows how the processor part ensures that the overall configuration is suitable and starts the show.
- The main focus therefore remains on the Stellaris processor, simply inside a package with DSP rather than on its own. This is of course in the interest of Stellaris users who may already have existing projects that could benefit from being put into a Concerto. It should be possible to do this in a simple fashion (high level of compatibility with the procesor part), enable the example DSP project to show that it runs with the original project in parallel, and then get to work with the DPS programming to obtain the benefits of this combination.
- Due to the fact that the new TI Code Composer can work with both cores at the same time, this environment will of course be the main focus.

Timescales are as follows:
- During February 2012 the STM32 and Kinetis projects receive main focus with project official 'releases' planned - with USB device and some other important peripherals in the ST package.
- IPv4/v6 web server dual-stack operation is also a goal by around the end of February.
- Then a new LM3Sxxxx package with Concerto and LM4F support will be the next target!




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