PIT configuration failure (KDS)

[fabius]

Hello,

for an application with a Kinetis K64 Processor i need a PIT to trigger a periodic task.
A task executed, 5 seconds after startup, is used for the PIT configuration. But if i do not not power up the PIT module separately, the PIT is not startet.
With a breakpoint after POWER_UP(6, SIM_SCGC6_PIT);  / before the PIT_MCR register is written in "fnConfigureInterrupt" [kinetis.c], it works as well.

Without ececuting the power up sequence for the PIT, i need to clear the PIT_MCR_MDIS flag manually to start the PIT.

This error only does occur in a larger project, but not in a vanilla uTasker 1.4.7.

May there be a race condition ?
I attached a screenshot of the assembly code from the working and the non-working configuration.

Regards,

Fabian

Code: [Select]

static void timed_main_Task(void){
.... Code ....
}

extern void fnXSetupTask (TTASKTABLE *ptrTaskTable){
/*configure PIT  */
PIT_SETUP x_pit_setup;
x_pit_setup.int_type = PIT_INTERRUPT;
x_pit_setup.int_handler = timed_main_Task;
x_pit_setup.int_priority = X_PIT_PRIORITY;
x_pit_setup.count_delay = PIT_US_DELAY(104000);
x_pit_setup.mode = PIT_PERIODIC;
x_pit_setup.ucPIT = 0;
POWER_UP(6, SIM_SCGC6_PIT);
fnConfigureInterrupt((void *)&x_pit_setup);

}


[mark]

Hi Fabian

Could you please try the following modification to the PIT code? [in fnConfigureInterrupt() case PIT_INTERRUPT]

Code: [Select]

            POWER_UP(6, SIM_SCGC6_PIT);                                  // ensure the PIT module is powered up
    #if defined ERRATA_ID_7914
            (void)PIT_MCR;                                               // dummy read of PIT_MCR to guaranty a minimum delay of two bus cycles after enabling the clock gate and not losing next write
    #endif
            PIT_MCR = 0;                                                 // ensure the PIT module is clocked
Add the define ERRATA_ID_7914 to your configuration file where the processor type is defined.

The errata e7914 is not included in the mask 1N83J, which is the mask used by the K64 but it sounds as though it is needed in your case. Could you also check the mask numbers of the K64 chips that you use - perhaps there is a difference between the devices in the two projects that could explain something (?)

As reference, here is the description to e7916 for the 1N71K mask (used by some KL devices).

e7914: PIT: After enabling the Periodic Interrupt Timer (PIT) clock gate, an attempt to
immediately enable the PIT module may not be successful.
Errata type: Errata
Description: If a write to the PIT module enable bit (PIT_MCR[MDIS]) occurs within two bus clock cycles of
enabling the PIT clock gate in the SIM_CG register, the write will be ignored and the PIT will
fail to enable.
Workaround: Insert a read of the PIT_MCR register before writing to the PIT_MCR register. This guarantees
a minimum delay of two bus clocks to guarantee the write is not ignored.

If you can confirm that the errata can affect the K64 I think that we will need to inform Freescale so that the latest document can be updated.

Regards

Mark

[fabius]

Hello,

thank you for your quick reply.

My Processor is a MK64FN1M0VLL12 (1N83J). I did some tests an i think that this errata applies to the K64 too.

When i set the optimisation to O1, then my task would not start the timer (vanilla uTasker 1.4.7).

Code: [Select]

static void PIT_INT_HANDLER(void){
_TOGGLE_PORT(B, LED_BLUE);
}

extern void fnPITInit (TTASKTABLE *ptrTaskTable){
/* Task is started 4 seconds after boot */
PIT_SETUP pit_setup;// interrupt configuration parameters
pit_setup.int_type = PIT_INTERRUPT;
pit_setup.int_handler = PIT_INT_HANDLER;
pit_setup.int_priority = PIT0_INTERRUPT_PRIORITY;
pit_setup.count_delay = PIT_US_DELAY(10400);
pit_setup.mode = PIT_PERIODIC;
pit_setup.ucPIT = 0;
fnConfigureInterrupt((void *)&pit_setup);                            // enter interrupt for PIT0 test
}

I replaced the init sequence in kinetis.c by direct writes to verfy my results:

Code: [Select]

* (unsigned long *)(0x4004803C) |= 0x00800000;
* (unsigned long *)(0x40037000) = 0;
//POWER_UP(6, SIM_SCGC6_PIT);                                  // {68} ensure the PIT module is powered up
//PIT_MCR = 0;

After the verification, I inserted  "(void)PIT_MCR;" into kinetis.c, but this does not work. The command seems to be ignored
by the compiler. (Screenshots)

Replacing "(void)PIT_MCR;" by  asm(" nop"), causes the desired effect (timer starts):

Code: [Select]

POWER_UP(6, SIM_SCGC6_PIT);                                  // {68} ensure the PIT module is powered up
asm(" nop");
PIT_MCR = 0;
Is there any other change required, use the instruction "(void)PIT_MCR;" ?

Regards,

Fabian

[mark]

Fabian

Make sure that the register PIT_MCR is declared as volatile:
#define PIT_MCR             *(volatile unsigned long *)(PIT_BLOCK + 0x000) // PIT Module Control Register

This is probably not the case in your source and so the compiler will presumably optimise the instruction out.

Regards

Mark

[fabius]

Hello,

the register was not defined as volatile. 
Now it works correctly.

How should this behavior be reported to Freescale ?

Regards

[mark]

Hi Fabian

Thanks for the confirmation.

I have reported this at the Freescale forum with a link back to here: https://community.freescale.com/thread/343994

This is probably adequate to get it looked into since there are enough details available for it to be reproduced.

Otherwise I'll create a service request.

Regards

Mark