Author Topic: output the system CLK  (Read 108 times)

Offline Raffaele

  • Newbie
  • *
  • Posts: 42
    • View Profile
output the system CLK
« on: June 19, 2020, 11:08:26 PM »
Hi,
simple question, how can I output the system clock on the KL03? Also I am assuming that I can only use PTA4 and PTA12 since they are the only two that have an ALT function called CLKOUT, right?

Offline mark

  • Global Moderator
  • Hero Member
  • *****
  • Posts: 3060
    • View Profile
    • uTasker
Re: output the system CLK
« Reply #1 on: June 20, 2020, 11:29:49 AM »
Hi

The routine
extern int fnClkout(int iClockSource);
allows controlling the clock out and defaults to PTA12 on the KL03.
However it is not possible to connect the system clock to it; only the BUS clock, IRC48M clock and some low frequency clocks.
To output the bus clock (equal to the Flash clock)
fnClkout(BUS_CLOCK_OUT);
is used.

Regards

Mark


Offline Raffaele

  • Newbie
  • *
  • Posts: 42
    • View Profile
Re: output the system CLK
« Reply #2 on: June 26, 2020, 07:06:36 PM »
That worked easily, thanks.

A few quick questions:

1) where is SLOW_CLOCK_DIVIDE used?

2) Can I generate a PWM using the PWM_INTERRUPT_SETUP  but in low power mode (32kHz clock) instead of using the 48MHz?
3) Does low power mode still supports SPI?
4) Can I actually "shut down" the 48MHz clock source?

My goal is to generate a PWM with the lowest power possible and sometimes use SPI.
« Last Edit: June 26, 2020, 08:04:28 PM by Raffaele »

Offline mark

  • Global Moderator
  • Hero Member
  • *****
  • Posts: 3060
    • View Profile
    • uTasker
Re: output the system CLK
« Reply #3 on: June 28, 2020, 01:43:16 PM »
Hi

1. The KL03 has the MCG Lite with has an internal oscillator (IRC) that can operate at either 2MHz or 8MHz (in addition to the IRC48M).
The output of this IRC can be divided down by 1, 2, 4, 8,..128.
If SLOW_CLOCK_DIVIDE is defined it should be oe of these values and the clock initiaisation then programs the FCRDIV accordingly. If it is not defined a divide by 1 is defaulted to.
The code that does it is:
    #if defined SLOW_CLOCK_DIVIDE                                        // if a slow clock output divider is specified
    MCG_SC = SLOW_CLOCK_DIVIDE_VALUE;                                    // select the output divider ratio
    #endif


2. The TPM (used for PWM signal generation) can be clocked from MCGPCLK, OSCERCLK or MCGIRCLK and as long as the chosen clock remains operational  in low power modes the operation continues.

3. The SPI is operated from the bus clock and can continue operation in low power modes that don't stop the bus clock.

4. I don't know whether the IRC48M is disabled automatically when not used, but in the MCG Lite module there is no specific way to disable this clock's operation.

Regards

Mark