Author Topic: Low Voltage Detection and flash storage  (Read 15166 times)

Offline Richard

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Low Voltage Detection and flash storage
« on: March 24, 2009, 06:23:02 AM »
Hi, all.  The 5223X has the ability to detect when the supply voltage is dropping and force an interrupt.  According to table 2.3 of the MCF52235 Data Sheet (still labeled "advance information" in revision 6!), the low voltage detect trip voltage is between 2.15 and 2.3 Volts.

I'd like to be able to save a few values in a block of internal flash between the time the low voltage interrupt occurs and power drops to a level that no longer permits reliable writing to flash.  Has anyone an idea if this is possible?  I.e., is it even possible to write to the internal flash at 2.15 Volts.  If so, how much time does it take to write one block of flash, and how long after the interrupt occurs will power still be above whatever is required to write flash?

Assume the worst case, i.e., that power fails completely while the 5223X is in its full power mode, and assume that power capacitors and resistors are as recommended by Freescale, e.g., on their demo board or Figure 5. "Suggested Connection Scheme for Power and Ground" of the MCF52235 Data Sheet. 

I guess that the first thing to do after receiving the interrupt would be to clear the Peripheral Power Management Registers (PPMRH, PPMRL) to shut down all the clocks and set all ports to be GPIO with their DDRs set to 0 (inputs) so the CPU wouldn't be sourcing more power than necessary...or is there a better way to do reduce power and still be able to write to the internal flash?

Thanks for whatever thoughts and information you may have.

    - Richard

Offline mark

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Re: Low Voltage Detection and flash storage
« Reply #1 on: March 24, 2009, 12:58:36 PM »
Hi Richard

I too have wondered about the possibilities of saving data based on the Low Voltage Detector but I have always been so discouraged that I never tried anything. I don't really understand how the LVD can be used for this since the CPU voltage is already way out of specification to run, let alone writing to FLASH. For this reason I have always programmed it to generate reset so that it ensures a clean start.

If I were to do this function I personally wouldn't use the LVD since it seems too risky to guaranty correct operation (even if it might work). I also would be very uncomfortable with the CPU voltage being monitored directly rather than the PSU itself.

I would prefer to use a voltage monitor on the input power supply - the one before any voltage regulation and capacitor buffering. Usually when this voltage is disconnected/turned off it can be used as an early indicator of power failing - a certain amount of time before the CPU voltage falls outside of normal operating spec. (3.0V). In addition, the buffering capacitor dimensions help coordinate the exact times involved. Connecting such an early warning indicator (eg. when the main supply drops below 3V3) connected to IRQ7 (NMI) should guaranty adequate time for the CPU to react to the impending power failure and do clean-up work, including saving data to FLASH.

Regards

Mark