Calculation of BWT WMR value

[dkg]

Hi Mark,

I am looking at the calculation for the value to place in the WMR register for the backup watchdog timer on a 5225x. This calculation is done in a #define for BWT_TIMEOUT_SYS_CLK in M5223x.h.

I am trying to figure out where the division of the BUS_CLOCK by 2 is coming from. The equation in the reference manual to come up with the timeout period is

T = [(WM + 1) ? 4096 + 4]?
where T is the timeout period and ? is the period of the BWT’s input clock.

When I plugged in the value actually being set in the WMR (19530) the result was approx. 1 second (with the belief that BUS_CLOCK is 80MHz). However, the intent is (and the comments indicate) that we wanted a 2 second timeout. So I did a little algebra against the documented equation and I don't get the division by 2 that your code has in it.

Where am I going wrong with the math?

[mark]

Hi Dave

The clock used by the backup watchdog timer can be selected to be either the relaxation oscillator or the system clock divided by 2.

MCF_CLOCK_BWCR = BWDSEL_SYS_DIV2;

where
    #define BWDSEL_SYS_DIV2 0x00                                         // Select half the system clock frequency as backup watchdog timer clock

The description of the BWCR register - bit BWDSEL (in the clock module) states that the source for the BWT is half the system clock (40MHz if the PLL is set to 80MHz).

Does this explain the discrepancy?

regards

Mark

[dkg]

Hi Mark,

Yes it does. My mistake. Thanks for clearing that up.

Dave G.