Hi
I have made some tests with just configuring channel 7. I too found that the result would never be ready so the software continued polling the ready bit forever.
Further tests showed the following:
- if channel 4..7 are being used alone (none from channels 0..3) and the ADC is not operating in parallel mode (that is, the two ADCs are working in a sequential manor) the first ADC must to be powered up as well as the second ADC.
To read channel 7, a sequence scan of all channels up to this are required (in this case channels 0...7).
- if the ADCs are operating in parallel mode (ADC_PARALLEL_MODE set in adc_setup.int_adc_mode) the two ADCs work in parallel and independently. Channel 7 can now be read without having the first ADC powered up. The scan sequence is 4,5,6,7. Since there are less channels in the scan, it is also faster.
If only channels between 4..7 are used I would suggest operating in parallel mode since it is then more efficient. If only channels 0..3 are used it is not relevant since the second ADC doesn't need to be powered to acheive the scan sequence.
I have made the following change to automate this depending on the channel and the mode. Only ADC modules needed for by the present configuration are powered and only channels needed in the sequence are scanned.
In m5223x.c in the ADC configuration:
if (ucADC_bit < (ADC_CHANNELS/2)) {
usModulePower = (PD0 | PD2); // first ADC module
usModulePowerCheck = (PSTS0 | PSTS2);
}
else {
usModulePower = (PD1 | PD2); // second ADC module
usModulePowerCheck = (PSTS1 | PSTS2);
if (ptrADC_settings->int_adc_mode & ADC_PARALLEL_MODE) { // {53}
usEnableBit = DISABLE_CH4;
}
else {
usModulePower |= PD0; // when not operating in parallel, also first ACC module must be powered
usModulePowerCheck |= PSTS0;
}
}
If you add the bold lines to this function (with change reference {53}) you will then have the new code and can verify that it fulfils your requirements.
Regards
Mark