Kinetis MK66, how overclock to 240Mhz

[LuisHS]

Hello Mark.

I want to apply overclock to a Kinetis MK66, to run at 240Mhz, I know it is possible because with the Teensy 3.6 I can apply an overclock at 192, 216 and 240Mhz, using the same microcontroller.
 
But I prefer to work with MCUXpresso, the problem is that I don't know how to configure it here, I have tried several combinations of the PLL but it always gives me error. The only sure  is that the maximum frequency of the VCO is 360Mhz according with the datasheet.

Can you help me to apply overclock at 240Mhz with a Kinetis MK66 using MCUXpresso ??

Regards

[mark]

Hi

In order to run at 180MH (anything above 120MHz) the high speed run mode needs to be enabled.
USE_HIGH_SPEED_RUN_MODE
Since flash programming is not possible in high speed run mode NO_FLASH_SUPPORT can be set in config.h

This will now give the maximum speeds of 180MHz CPU clock, 60MHz bus clock and 25.7MHz Flash clock.

To increase the CPU clock to above 180MHz (over-clocking and out of specification according to the manufacturer) the PLL multiplication factor can be increased (range is x16..x47, whereby x30 is used on the FRDM-K66F board for 180MHz.
To achieve 240Mhz x40 is needed but thsi will result in an error due to the code checking that specification have been respected. In such a case the checking code needs to be disabled:
        #if CORE_CLOCK > 180000000
            #error PLL frequency out of range: maximum 180MHz
        #endif

This can be removed.

Since also the bus clock frequency will also be out of specification there are two things that can be done:
- either remove its check
        #if BUS_CLOCK > 60000000
            #error bus clock frequency out of range: maximum 60MHz
        #endif
- or slow it down to respect its maximum 60MHz speed with
#define BUS_CLOCK_DIVIDE     4                           // 240/4 to give 60MHz (max. 60MHz)

Probably the second method is best to keep as little out-of-spec as possible.


Same goes for the Flex bus clock:
#define FLEX_CLOCK_DIVIDE     4                           // 240/4 to give 60MHz (max. 60MHz)


The Flash clock is ver critical - if it is slightly too high it won't be able to read the code and fails, therefore
#define FLASH_CLOCK_DIVIDE   9                           // 240/9 to give 26.66Hz (max. 28MHz)



Note that both the PLL (the PLL operates at twice the output clock speed and so runs at 480MHz) and the CPU are operating out of specification and so is not guaranteed. It is possible that it works but has potential long-term reliability issues.


That is, it should only be used for personal hobby projects and not when there can be liability issues in professional work that could, in the worst case, result in the developer being sued for knowingly risking the end product or end users (think about the Toyota case where they knowingly risked using too little RAM which resulted in 89 deaths due to their electric accelerator blocking and the subsequently billions of dollars of fines and compensations: https://www.youtube.com/watch?v=NCTf7wT5WR0 )

Regards

Mark

[LuisHS]

Thanks mark.

Then the overclock consists of exceeding the 360Mhz of the VCO, to increase it to 480Mhz?, Since then this is divided by two for the working frequency of the core.

In what source code file can I find these checks?

        #if CORE_CLOCK > 180000000
            #error PLL frequency out of range: maximum 180MHz
        #endif

        #if BUS_CLOCK > 60000000
            #error bus clock frequency out of range: maximum 60MHz
        #endif


 

[mark]

Hi

These checks are in the uTasker project code. If you use MCUXpresso generated code it will not be there.

Regards

Mark