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51
NXPTM M522XX, KINETIS and i.MX RT / i.MX RT Guide to Setting Peripheral Functions
« Last post by mark on January 24, 2024, 08:26:01 PM »
Hi All

This example shows how to configure a peripheral pin with help if the _CONFIG_PERIPHERAL() or _CONFIG_PERIPHERAL_LOOPBACK() macros.

As an example I will configure LPSPI3_SCK function on the pin referenced as GPIO_AD_B1_15 (assuming an i.MX RT 106x)


This is the code:

IOMUXC_LPSPI3_SCK_SELECT_INPUT = IOMUXC_LPSPI3_SCK_SELECT_INPUT_GPIO_AD_B1_15_ALT2;
_CONFIG_PERIPHERAL_LOOPBACK(GPIO_AD_B1_15, LPSPI3_SCK, (IOMUXC_SW_PAD_CTL_PAD_PKE | IOMUXC_SW_PAD_CTL_PAD_SPEED_MEDIUM | IOMUXC_SW_PAD_CTL_PAD_DSE_6));


and this is how one arrives at it:

1. One needs to know which GPIO reference (PAD) it is on -> GPIO_AD_B1_15 in this case

2. One searches for this in iMX.h until one finds the list of mux options belonging to it

    #define GPIO_AD_B1_15_FLEXSPIA_SS0_B           (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT0)
    #define GPIO_AD_B1_15_ACMP_OUT03               (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT1)
    #define GPIO_AD_B1_15_LPSPI3_SCK               (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT2)
    #define GPIO_AD_B1_15_SAI1_TX_SYNC             (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT3)
    #define GPIO_AD_B1_15_CSI_DATA02               (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT4)
    #define GPIO_AD_B1_15_GPIO1_IO31               (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5)
    #define GPIO_AD_B1_15_USDHC2_DATA7             (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT6)
    #define GPIO_AD_B1_15_KPP_COL00                (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT7)
    #if defined iMX_RT106X
        #define GPIO_AD_B1_15_ENET2_1588_EVENT3_IN (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT8)
        #define GPIO_AD_B1_15_FLEXIO3_FLEXIO15     (IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT9)
    #endif



3. One take the full mux name (GPIO_AD_B1_15_LPSPI3_SCK) and insert it into the macro, with a comma separating the GPIO reference and the peripheral mux reference belonging to that GPIO:

 _CONFIG_PERIPHERAL_LOOPBACK(GPIO_AD_B1_15, LPSPI3_SCK, (IOMUXC_SW_PAD_CTL_PAD_PKE | IOMUXC_SW_PAD_CTL_PAD_SPEED_MEDIUM | IOMUXC_SW_PAD_CTL_PAD_DSE_6));


This can't be done wrong since it will not compile if incorrect GPIOs aad peripherals are attempted.
The characteristics (last parameter) can be modified to control drive strength and slew rate, etc.

4. Note that either _CONFIG_PERIPHERAL() or _CONFIG_PERIPHERAL_LOOPBACK() is used.
The first is used in most cases but the _CONFIG_PERIPHERAL_LOOPBACK() one is needed for some signals that are generated to be driven onto the pin and also need to be looped back internally to be driven to the peripheral itself. In the case of the LPSPI master operation this MUST be used for the CLK otherwise the clock will be generated but not be connected internally, meaning it won't work completely.

5. Some peripheral pins need an additional sub-muxing setting since they can be located on multiple pins.

IOMUXC_LPSPI3_SCK_SELECT_INPUT = IOMUXC_LPSPI3_SCK_SELECT_INPUT_GPIO_AD_B1_15_ALT2;

To see whether it is necessary it is easiest to search iMX.h for IOMUXC_x (where x is the name of the peripheral signal) -> IOMUXC_LPSPI3_SCK
If it shows up as a IOMUX_xxxx_SELECT_INPUT register, like:

    #define IOMUXC_LPSPI3_SCK_SELECT_INPUT             *(unsigned long *)(IOMUXC_SW_BLOCK + 0x0510) // LPSPI3_SCK_SELECT_INPUT DAISY register
        #define IOMUXC_LPSPI3_SCK_SELECT_INPUT_GPIO_AD_B0_00_ALT7 0x00000000 // select GPIO_AD_B0_00 for mode: ALT7
        #define IOMUXC_LPSPI3_SCK_SELECT_INPUT_GPIO_AD_B1_15_ALT2 0x00000001 // select GPIO_AD_B1_15 for mode: ALT2


it should be set.

IOMUXC_LPSPI3_SCK_SELECT_INPUT = IOMUXC_LPSPI3_SCK_SELECT_INPUT_GPIO_AD_B1_15_ALT2;



One can get away without setting it in case the 0x00000000 is true since it defaults to that, but as good practice it is best to always set the value. It also means that when modifying such configurations one doesn't forget to check and set the value accordingly.

If there is no corresponding IOMUXC_xxxxx_SELECT_INPUT register there is no sub-mux setting to be made.


6. After making such changes one can run the simulator and hover the mouse over the pins one wants to check and it will show the present GPIO/peripheral function so one can easily verify that it is correct before testing on HW.



Regards

Mark
52
NXPTM M522XX, KINETIS and i.MX RT / Re: Compiler Issue
« Last post by mark on January 24, 2024, 08:13:58 PM »
Hi Neil

I have attached the missing folder as zip file.

Regards

Mark
53
NXPTM M522XX, KINETIS and i.MX RT / Re: Compiler Issue
« Last post by neil on January 22, 2024, 07:17:56 PM »
Hi Mark,
  My version doesnt have a CW10 project, would it be possible to get a copy of this?

Best Regards
Neil
54
NXPTM M522XX, KINETIS and i.MX RT / Re: Compiler Issue
« Last post by mark on January 19, 2024, 09:42:03 PM »
Hi Neil

It is a number of years since I last worked with Coldifre and with the CW IDEs, therefore I haven't had any practice for a very long time.
However there is a CW10 project in
\Applications\uTaskerV1.4\CodeWarrior_M522XX_CW10
and the IDE's project settings are in \Applications\uTaskerV1.4\CodeWarrior_M522XX_CW10\ProjectSettings - the content of that folder needs to be copied to the root of the project (above \Applications) and that should allow your to test that the CW 10 or 11 version can build the reference project [I haven't tested this for a very long time so can't guarantee there is not an incompatibility somewhere in the later versions but any issues will be due to prototype changes or new defines needing to be set somewhere, thus easily fixable].

Good luck

Regards

Mark

55
NXPTM M522XX, KINETIS and i.MX RT / Re: Compiler Issue
« Last post by neil on January 14, 2024, 09:34:08 PM »
Hi Mark,
  Because of the issues, I thought maybe better to upgrade, so I have downloaded Codewarrior v10.5 and V11.  Looking at the page https://www.utasker.com/kinetis/compilers.html#CW10  it mentions how to convert a current application (V7.1) to V10.x . Would this work for V11, or V10.5?

Looking at a previous post a while back, https://www.utasker.com/forum/index.php?topic=2042.0  , I started to try the upgrade, but got V7.1 to work. But now I am thinking of doing the upgrade.

I got stuck as I dont have  folders ".settings", ".cproject" etc.  as mentioned in the first paragraph of the conversion link above. And also I dont have a "project_settings" folder, or any "."folder.   These things are mentioned before starting codewarrior 10.0.

Many Thanks
Neil
56
NXPTM M522XX, KINETIS and i.MX RT / Compiler Issue
« Last post by neil on January 14, 2024, 01:29:59 PM »
Hi
  I understand this isnt a processor issue, but wonder if someone else has come across this before , and hopefully found a fix.

I am using Codewarrior 7.1 on Windows 10, and been working well for a few years now. But for some reason during debugging it doesnt display the variable values correctly. For some reason it simply repeats the variable name, see the attached.

Best Regards
Neil
57
Mark,

Thanks for that.  I was able to test it.  I think there is still some issue with the interrupt handler, I had to remove the SDHC_DETECT_INTERRUPT_GPIO exclusion in kinetis_SDHC.h before the card would move beyond the idle command.  After removing this, I was able to get the card mounted.

line 193 - before removing the exclusion:

Code: [Select]
#if (defined SDCARD_DETECT_INPUT_INTERRUPT && !defined SDHC_DETECT_INTERRUPT_GPIO)
    sdcard_handler[0] = int_handler;
        #if (defined _iMX && defined USE_uSDHC2)
    fnEnterInterrupt(irq_USDHC2_ID, SDCARD1_STATUS_INTERRUPT_PRIORITY, sdcard_state_change);
    SDHC2_IRQSIGEN = (SDHC_IRQSIGEN_CRMIEN | SDHC_IRQSIGEN_CINSIEN);     // enable interrupts on card insertion and removal
    SDHC2_IRQSTATEN = 0xffffffff;                                        // allow all enabled interrupts
        #else
    fnEnterInterrupt(irq_USDHC1_ID, SDCARD1_STATUS_INTERRUPT_PRIORITY, sdcard_state_change);
    SDHC_IRQSIGEN = (SDHC_IRQSIGEN_CRMIEN | SDHC_IRQSIGEN_CINSIEN);      // enable interrupts on card insertion and removal
    SDHC_IRQSTATEN = 0xffffffff;                                         // allow all enabled interrupts
        #endif
#endif
58
Hi

The selections are in the file app_hw_xxxx.h since it is specific to the HW.
Assuming you are working with an i.MX RT the default tends to be

            #define SDCARD_DETECT_INPUT_INTERRUPT                        // use card detect interrupt rather than polling the card
            #define SDCARD_DETECTION()      ((SDHC_PRSSTAT & SDHC_PRSSTAT_CINST) != 0) // card detection input


and if SDHC_DETECT_INTERRUPT_GPIO is enabled a GPIO can be used instead.

but it can be polled (via GPIO) with

#define SDCARD_DETECT_INPUT_POLL                                 // use card detect switch for detection polling (use together with T_CHECK_CARD_REMOVAL)

or polled by reading an SD card register if neither is enabled.

There is no specific VSEL control for the i.MX RT but if needed it can be added to the POWER_TO_SD_CARD() macro via a GPIO.

Regards

Mark


P.S: Note that the i.MX RT project has only used the SDHC's dedicated card detection line and so I found that I needed to adjust some conditional defines in the mass storage code so that the GPIO interrupt initialisation was included (for example). I have checked these changes in but not tested on HW (only in simulator). I used this on an RT 1020:

            #define SDCARD_DETECT_INPUT_INTERRUPT                        // use card detect interrupt rather than polling the card
            #define SDHC_DETECT_INTERRUPT_GPIO                           // use general GPIO rather than the SDHC's detect input
            #if defined SDHC_DETECT_INTERRUPT_GPIO
                #define SDCARD_DETECT_PORT     PORT2
                #define SDCARD_DETECT_PIN      PIN_GPIO_EMC_00_GPIO2_IO00
                #define PRIORITY_SDCARD_DETECT_PORT_INT     PRIORITY_PORT_2_LOW
                #define SDCARD_DETECTION()      (_READ_PORT_MASK(2, SDCARD_DETECT_PIN) == 0) // card detection input




59
Is there a section in the config file to set alternate pins for these SDCARD functions?

I didn't see any way to select an arbitrary GPIO pin for card detect (as can be done in the MCUXpresso SDK).  I did manually change the PWREN pin, and I haven't found the VSELECT pin setting yet.

JK
60
NXPTM M522XX, KINETIS and i.MX RT / Re: UDP socket buffer size
« Last post by mark on November 10, 2023, 11:19:52 PM »
Hi Neil

As long as the Ethernet Rx buffer can hold the UDP reception it will be adequate - your receive the UDP packet directly in that buffer:

#define LAN_BUFFER_SIZE        1518

is adequate for the largest Ethernet frame (excluding jumbo frames) and so UDP payload (over IPv4) is limited to 1492 bytes (I believe) - this assumes no fragmentation, which will be the case in modern local networks.

Regards

Mark
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